1. Field of the Invention
The present invention generally relates to a computer memory system, and more specifically relates to error detection and predictive failure analysis in a memory system.
2. Background of the Related Art
Computer system memory includes both long-term (non-volatile) and short-term (volatile) memory devices. Long-term memory devices, such as a hard disk drive (HDD), are capable of retaining software and data even in a powered-off state. Short-term memory devices, such as a Dual In-Line Memory Module (DIMM), are capable of retaining instructions and data while in a powered-on state. Software instructions and data may be stored indefinitely in long-term memory and loaded on an as-needed basis to short-term memory for execution by a processor. The results from executing the instructions, such as processed data, may also be temporarily stored in the short-term memory for continued access during a powered-on computing session, or in long-term memory for access and processing in a subsequent computing session.
Errors can occur in a DIMM, which can affect the performance and reliability of a memory system. One type of DIMM error is the Single Bit Error (SBE). Random power and ground noise in close proximity to high-efficiency switch regulators is one cause of SBEs. The increasingly tighter timing requirements in a memory system is another contributing factor to SBEs. DIMMS are also incorporating increasingly larger memory-cell densities, which leads to a higher bit error rate (BER) per DIMM. Computer systems are incorporating an increasing density of DIMMs per system, which may also lead to a correspondingly higher error rate.